The present invention generally relates to liquid crystal display devices and more particularly to fabrication of a liquid crystal display device having a gate electrode pattern of Al or an Al alloy.
Liquid crystal display devices are used extensively in information processing apparatuses such as a computer as a compact display device consuming little electric power.
In order to realize a high-quality color representation, recent liquid crystal display devices tend to use a so-called active-matrix driving method, in which each of the pixel electrodes in the liquid crystal display device is turned on and off by a corresponding TFT that is provided on a glass substrate constituting the liquid crystal display device in correspondence to the pixel electrode.
Conventionally, the TFTs for use in liquid crystal display devices have used a gate electrode of Cr in view of the reliability and high yield of production. On the other hand, recent liquid crystal display devices having a large display area require a low resistance material such as Al for the gate electrode. On the other-hand, such a gate electrode formed of Al or an Al alloy suffers from the problem of hillock, in which crystal grains constituting the polycrystalline Al gate cause a migration in the gate electrode so as to relax the stress when a thermal annealing process is applied in the fabrication process of the TFT. Such a hillock causes a formation of projections in the Al gate electrode.
FIG. 1 shows the construction of a conventional active-matrix type liquid crystal display device 10.
Referring to FIG. 1, the liquid crystal display device 10 includes a TFT glass substrate 11 carrying thereon a number of TFTs and corresponding transparent pixel electrodes, and a glass substrate 12 is provided on the TFT substrate 11 so as to face the TFT substrate 11 with a gap formed therebetween. The gap thus formed is filled by a liquid crystal layer 1 in the state that the liquid crystal layer 1 is confined between the TFT substrate 11 and the opposing substrate 12 by a seal member not illustrated.
In the conventional liquid crystal display device 10 of the foregoing construction, the direction of the liquid crystal molecules in the liquid crystal layer 1 is selectively modified by applying a drive voltage to a selected pixel electrode via a corresponding TFT.
Further, it should be noted that the liquid crystal display device 10 includes a pair of polarizers at respective outer sides of the glass substrates 11 and 12 in the crossed Nicol state, and the glass substrates 11 and 12 further carry molecular alignment films on the respective interior sides thereof in contact with the liquid crystal layer 1.
FIG. 2 shows a part of the TFT substrate 11 in an enlarged scale.
Referring to FIG. 2, the TFT substrate 11 carries thereon a number of pad electrodes 11A for receiving a scanning signal and a number of scanning electrodes 11a each extending from a corresponding pad electrode 11A in a first direction. Further, the TFT substrate 11 carries thereon a number of pad electrodes 11B for receiving an image signal and a number of signal electrodes 11b each extending from a corresponding pad electrode 11B in a second direction generally perpendicular to the first direction. Further, in correspondence to each intersection of a scanning electrode 11a and a signal electrode 11b, there is provided a TFT 11C and a corresponding transparent pixel electrode 11D.
In the liquid crystal display device 10 of the foregoing construction, one of the scanning electrodes 11a is selected by selectively supplying a scanning signal to the corresponding electrode pad 11A. Further, a signal electrode 11b is selected by supplying an image signal to the corresponding electrode pad 11B. Thereby, the image signal is forwarded to the corresponding transparent pixel electrode 11D via the TFT 11C.
FIG. 3 shows the construction of a conventional TFT 11C.
Referring to FIG. 3, the TFT 11C is constructed on a glass substrate 21 corresponding to the TFT substrate 11 of FIG. 1 and includes an SiO.sub.2 film 22 formed on the glass substrate 21 with a thickness of about 200 nm, an active region 23 of a B-doped polysilicon pattern formed on the SiO.sub.2 film 22 with a thickness of about 45 nm, an SiO.sub.2 gate insulation film 24 formed on the active region 23 with a thickness of about 120 nm, and a gate electrode 25 of Al or an Al alloy such as an Al--Sc alloy or an Al--Nd alloy formed on the gate insulation film 24 with a thickness of about 300 nm. The gate electrode 25 is covered by a dense, anode-oxidized Al.sub.2 O.sub.3 film with a thickness of about 10 nm.
The gate electrode 25 and the anode-oxidized Al.sub.2 O.sub.3 film 26 cover a part of the gate insulation film 24, while the active region 23 is formed with diffusion regions 23A and 23B of the n.sup.+ -type at the outer sides of the gate insulation film 24. Further, the active region 23 includes an offset region 23C of the n.sup.- -type characterizing an LDD structure adjacent to the n.sup.+ -type diffusion region 23A in overlapping relationship with the gate insulation film 24 when viewed perpendicularly to the substrate 21. Similarly, an offset region 23D of the n.sup.- -type is formed in the active region 23 adjacent to the n.sup.+ -type diffusion region 23B in overlapping relationship with the gate insulation film 24.
In the TFT of FIG. 3, it should be noted that a scanning electrode 11a of FIG. 2 is connected to the gate electrode 25, while one of the n.sup.+ -type diffusion regions 23A and 23B is connected to a signal electrode 11b. Thereby, the other of the diffusion regions 23A and 23B is connected to a transparent pixel electrode 11D via a contact hole formed in a protective insulation film not illustrated.
FIGS. 4A-4F show the fabrication process of the TFT of FIG. 3.
Referring to FIG. 4A, an amorphous silicon film doped with B is formed on the SiO.sub.2 film 22 covering the glass substrate by a plasma CVD process, followed by a crystallization process conducted by irradiating an excimer laser beam to convert the amorphous silicon film to a polysilicon film. The excimer laser beam induces a heating in the amorphous silicon film to a temperature of about 200.degree. C. The foregoing active region 23 is then formed by a patterning process of the polysilicon film thus formed, wherein the patterning process may be conducted by an RIE process using CF.sub.4 and O.sub.2.
Next, an SiO.sub.2 film 24A is deposited on the SiO.sub.2 film 22 in correspondence to the gate oxide film 24 by a plasma CVD process using TEOS, such that the SiO.sub.2 film 24A covers the polysilicon active region 23. Further, a conductor layer 25A of Al or an Al alloy is formed on the SiO.sub.2 film 24A in correspondence to the gate electrode 25 by a sputtering process, and a dense anodic oxide film 28A is formed on the surface of the conductor layer 25A with a thickness of typically about 10 nm. The anodic oxide film 28A may be formed by conducting an anodic oxidation process of the conductor layer 25A in a solution of ammonium tartrate and ethylene glycol while applying a constant voltage. The anodic oxide film 28A thus formed has a dense structure and is generally called "barrier-type" or "barrier AO." It should be noted that the anodic oxide film 28A shows an etching rate generally equal to the etching rate of Al against an etchant called "Al-mixed-acid," which is used commonly for the etching of Al, wherein the Al-mixed-acid is primarily formed of a phosphoric acid (H.sub.3 PO.sub.4) added further with an acetic acid and a nitric acid.
Next, in the step of FIG. 4B, a resist pattern 29 is formed on the anodic oxide film 28A, followed by a patterning of the anodic oxide film 28A and the conductor layer 25A underneath the film 28A while using the resist pattern 29 as a mask, to form a conductor pattern 25B carrying thereon an anodic oxide pattern 28B. In this patterning process, the conductor layer 25A is patterned by a wet etching process at a temperature of typically 45.degree. C. while using the foregoing Al-mixed-acid as an etchant.
Next, in the step of FIG. 4C, the part of the anodic oxide pattern 28B forming an overhang structure under the resist pattern 29 is removed by a wet etching process, and a pair of porous anodic oxide films 27A and 27B are formed at both lateral sides of the conductor pattern 25B by an anodic oxidation process conducted in an oxalic acid while supplying a substantially constant current to the conductor pattern 25B. As a result of the formation of the anodic oxide film 27A and 27B, there is formed a conductor pattern 25C in the conductor pattern 25B such that the conductor pattern 25C is laterally surrounded by the foregoing porous anodic oxide films 27A and 27B. It should be noted that the conductor pattern 25C is a remaining part of the original conductor layer 25.
It should be noted that the foregoing porous anodic oxide films 27A and 27B are generally called "porous-type" or "porous AO," wherein the porous AO has a feature of being dissolved by the foregoing Al-mixed-acid. On the other hand, the etching of the overhang part of the anodic oxide pattern 28B is conducted by a Cr-mixed-acid to be described later at a temperature of about 65.degree..
Next, in the step of FIG. 4D, the resist pattern 29 of FIG. 4C is removed and the SiO.sub.2 film 24A is subjected to a dry etching process while using the anodic oxide films 27A and 27B and the intervening Al pattern 25C to form the gate insulation film 24 of FIG. 3. Next, the structure thus obtained is subjected to an anodic oxidation process substantially identical with the anodic oxidation process used for forming the anodic oxide film 28A, to form a dense barrier-type anodic oxide film similar to the anodic oxide film 28A in the region 25C, wherein the dense barrier-type anodic oxide film thus formed constitutes the anodic oxide film 26 of FIG. 3. It should be noted that the anodic oxide film 26 thus formed covers the top part and both lateral sides of the gate electrode 25.
Next, in the step of FIG. 4E, the porous anodic oxide films 27A and 27B are removed by a wet etching process using the Al-mixed-acid, typically at a temperature of 45.degree. C. As a result of the wet etching process, a surface part of the gate insulation film 24 is exposed at the outer sides of the barrier-type anodic oxide film 26.
Next, in the step of FIG. 4F, an ion implantation process of P or As is conducted into the active region 23 while using the gate electrode 25 and the anodic oxide film 26 as a mask. By conducting a thermal annealing process, the n.sup.+ -type diffusion regions 23A and 23B are formed in the active region 23 at the outer sides of the gate insulation film 24. Further, the ion implantation process of the impurity element occurs also in the regions 23C and 23D via the gate oxide film 24, and the regions 23C and 23D form the LDD region of the n.sup.- -type.
In the steps of FIGS. 4A-4F, the gate electrode 25 is covered by the barrier-type, dense anodic oxide film 26 and the hillock formation in the gate electrode 25 is effectively suppressed even when a thermal annealing process is conducted for activating the diffusion regions 23A and 23B or the LDD regions 23C and 23D.
In the anodic oxidation process of FIG. 4C or FIG. 4D, it should be noted that the conductor patterns 25B on the substrate 21 corresponding to the glass substrate 11 of FIG. 2 are connected with each other by a conductor pattern 25D for supplying an electric current to the conductor pattern 25B or 25C. Thereby, the conductor pattern 25D forms, together with the conductor patterns 25B or 25C, a lattice pattern on the substrate 21. The conductor pattern 25D is formed in the step of FIG. 4B simultaneously and integrally with the conductor pattern 25B, wherein the conductor pattern 25D thus formed is removed after the step of FIG. 4E by a wet etching process conducted while using a resist mask 31. As a result of the wet etching process of the conductor pattern 25D, the gate electrode patterns 25 are separated from each other.
It should be noted that the wet etching process of the conductor pattern 25D is conducted by using the resist mask 31 as represented in FIG. 5, wherein the resist mask 31 includes a window 31A exposing the conductor pattern 25D. While not illustrated in FIG. 5, it should be noted that the conductor patterns 25B and the conductor pattern 25D carry thereon the anodic oxide film 28B represented in FIG. 4B.
FIG. 6 shows the foregoing wet etching process of the conductor pattern 25D conducted by using the resist mask 31.
Referring to FIG. 6, it will be noted that the conductor pattern 25D is divided into a first Al pattern (25D).sub.1 and a second Al pattern (25D).sub.2 as a result of the wet etching process. Further, the anodic oxide film 28B on the conductor pattern 25D is also divided into a first oxide pattern (28B).sub.1 and a second oxide pattern (28B).sub.2, wherein the patterning of the dense anodic oxide film 28B is conducted by a Cr-mixed-acid, which is a phosphoric acid etchant having a composition similar to that of the Al-mixed-acid but added further with CrO.sub.3. The wet etching process using the Cr-mixed-acid is conducted typically at about 65.degree.. On the other hand, the conductor pattern 25D underneath the anodic oxide pattern 28 is conducted by using the Al-mixed-acid typically at a temperature of 45.degree. C.
In the fabrication process of recent liquid crystal display devices having a large display area, it is necessary to increase the duration of the etching process for eliminating the etching residue completely. In such a case, the Al conductor pattern 25D experiences a substantial lateral etching and the conductor patterns (25D).sub.1 and (25D).sub.2 tend to be receded with respect to the anodic oxide films (28B).sub.1 and (28B).sub.2. In other words, the anodic oxide films (28B).sub.1 and (28B).sub.2 form an overhang of 1-2 .mu.m with respect to the conductor patterns (25D).sub.1 and (25D).sub.2. As a result of the process of FIG. 6, a gate electrode 25 of FIG. 4E is electrically separated from other gate electrodes 25.
FIG. 7 shows the case of applying the etching process of FIG. 6 to the conductor pattern 25B formed on a glass substrate of a large area.
Referring to FIG. 7, it was discovered that, as a result of the etching process of FIG. 6, the width of the gate electrode 25 is reduced significantly in correspondence to the part where the conductor pattern 25D has been formed. When such an abnormal narrowing of the conductor pattern is caused in the gate electrode 25, the yield of the liquid crystal display device is deteriorated inevitably. Associated with this, the reliability of the produced liquid crystal display device is also deteriorated. In FIG. 7, it should be noted that the illustration of the anodic oxide film 26 on the gate electrode pattern 26 is omitted for the sake of simplicity. As a result of the patterning of the conductor pattern 25D, the conductor patterns 25B of FIG. 5 are changed to the gate electrodes 25 in the state of FIG. 7.
FIGS. 8A and 8B show a possible mechanism of the foregoing anomaly caused in the gate electrode 25, wherein those parts corresponding to the parts described previously are designated by the same reference numerals and the description thereof will be omitted.
Referring to FIG. 8A, it can be seen that the lateral edge part of the Al pattern (25D).sub.1 or the Al pattern (25D).sub.2 is receded, as a result of the wet etching process of the conductor pattern 25D, with respect to a corresponding lateral edge of resist pattern 31 defining the resist window 31A. As a result, there is formed an overhang structure in the barrier-type anodic oxide film (28B).sub.1 as noted before.
When the resist pattern 31 is removed in this state by using an exfoliating liquid, the anodic oxide film (28B).sub.1 or (28B).sub.2, now losing a mechanical support, may become slackened and bend on the SiO.sub.2 film 22 as indicated in FIG. 8B. When this occurs, the slackened anodic oxide film (28B).sub.1 of (28B).sub.2 may wrap the exfoliating liquid in the space formed between the SiO.sub.2 film, the lateral edge of the Al pattern (25D).sub.1 and the slackened anodic oxide film (28B).sub.1.
While the exfoliating liquid itself does not cause an etching in the Al pattern (25D).sub.1, it seems that the exfoliating liquid does cause, when mixed with water, an etching on the side wall of the Al pattern (25D).sub.1 or (25D).sub.2 with a substantial etching rate.
FIG. 9 shows another problem pertinent to the conventional fabrication process of the liquid crystal display device, wherein those parts corresponding to the parts described previously are designated by the same reference numerals and the description thereof will be omitted.
In the conventional process of FIG. 4E, the porous anodic oxide films 27A and 27B of FIG. 4D are removed by a selective wet etching process conducted by using an Al-mixed-acid. It should be noted that the step of FIG. 4E is conducted before the separation step of FIG. 6. Thus, when there is a pinhole 26X in the barrier-type anodic oxide film 26 as represented in FIG. 9, the gate electrode 25 is also etched by the Al-mixed-acid, as the Al-mixed-acid reacts also on Al.
The problem of FIG. 9 is observed frequently when fabricating a large size liquid crystal display device, particularly when the foregoing wet etching process of the porous anodic oxide films 27A and 27B is conducted in the state that the gate electrodes 25 are connected with each other by the conductor pattern 25D. While the reason of this phenomenon is not fully explored, it seems that the formation of the pinhole 26X is related to an electrochemical reaction caused by a current flowing through the conductor pattern. When such an etching is caused in the gate electrode 25 in correspondence to the pinhole 26X, the yield of production of the liquid crystal display device is deteriorated seriously. Further, the liquid crystal display devices thus formed have a serious problem of reliability.